AI Sample Clock Timebase Signal
Any PFI can externally input the AI Sample Clock Timebase (ai/SampleClockTimebase) signal, which is not available as an output on the I/O connector. The ai/SampleClockTimebase is divided down to provide the Onboard Clock source for the ai/SampleClock. You can configure the polarity selection for ai/SampleClockTimebase as either rising or falling edge.
The maximum allowed frequency is 20 MHz, with a minimum pulse width of 23 ns high or low. There is no minimum frequency limitation.
The 20MHzTimebase or the 100kHzTimebase generates ai/SampleClockTimebase unless you select some external source. The following figure shows the timing requirements for ai/SampleClockTimebase.
